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Samsung Galaxy Tab S5e Wi-Fi (samsung-gts4lvwifi)

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🚧 This page is a work-in-progress. Some information contained within may be inaccurate or incomplete.
Samsung Galaxy Tab S5e Wi-Fi (SM-T720)
Samsung Galaxy Tab S5e Wi-Fi
Samsung Galaxy Tab S5e Wi-Fi
Manufacturer Samsung
Name Galaxy Tab S5e Wi-Fi (SM-T720)
Codename samsung-gts4lvwifi
Released 2019
Type tablet
Hardware
Chipset Qualcomm Snapdragon 670 (SDM670)
CPU Octa-core Kryo 360 (2 x 2.0 GHz
6 x 1.7 GHz)
GPU Adreno 615
Display 2560x1600, 10.5" (267 mm) diagonal, WQXGA Super AMOLED
Storage 64/128 GB
Memory 4/6 GB
Architecture aarch64
Software
Original software
The software and version the device was shipped with.
Android 9
Extended version
The most recent supported version from the manufacturer.
Android 11
postmarketOS
Category archived
Mainline
Instead of a Linux kernel fork, it is possible to run (Close to) Mainline.
no
Device package device-samsung-gts4lvwifi
Kernel package linux-postmarketos-qcom-sdm670
Features
Flashing
Whether it is possible to flash the device with pmbootstrap flasher.
Untested
USB Networking
After connecting the device with USB to your PC, you can connect to it via telnet (initramfs) or SSH (booted system).
Untested
Battery
Whether charging and battery level reporting work.
Untested
Screen
Whether the display works; ideally with sleep mode and brightness control.
Untested
Touchscreen
Untested
Multimedia
3D Acceleration
Untested
Audio
Audio playback, microphone, headset and buttons.
Untested
Camera
Untested
Connectivity
WiFi
Untested
Bluetooth
Untested
GPS
Untested
Miscellaneous
FDE
Full disk encryption and unlocking with unl0kr.
Untested
Sensors
Accelerometer
Handles automatic screen rotation in many interfaces.
Untested
Not to be confused with the Samsung Galaxy Tab S5e LTE (samsung-gts4lv).
Warning WARNING: Make sure that you are prepared to (probably) lose functionality when installing postmarketOS. Samsung Knox will blow an efuse when the OS is modified that will permanently disable Knox-only features like Samsung Pay, and you will NEVER be able to use those features again (not actually tested for this device yet).

This is the device page for the Samsung Galaxy Tab S5e Wi-Fi (model SM-T720; codename gts4lvwifi). While the kernel compiles and flashing is available, this device is in an extremely early state of development.

Contributors

Maintainer(s)

Users owning this device

  • A-Australian (Notes: Currently running LOS 22.1, rooted & LSposed installed)
  • Joshaspinall (Notes: Currently running Lineage Android)
  • Usia (Notes: porting to PostmarketOS)
  • Usia (Notes: running LineageOS)
  • Viciouss (Notes: LineageOS + Aurora Store)

How to enter flash mode

  • Download Mode: Hold Volume Up and Volume Down while connecting the device to a computer with a USB cable.
  • Recovery Mode: Hold Volume Up and Power while connecting the device to a computer with a USB cable.

Installation

Warning WARNING: Doing this will ERASE ALL DATA on your device. Please backup all your personal data before continuing!

Before installing postmarketOS, it is recommended to upgrade to the latest official Android 10 firmware and to keep backups of some partitions for easy recovery.

In order to flash custom partitions, the bootloader needs to be unlocked. Follow Unlocking Bootloaders#Samsung to unlock it, with step 4 using Volume Up + Volume Down. After completing those steps, postmarketOS can be flashed.

Backup with TWRP

Prerequisites

  1. TWRP. See here to install TWRP
  2. adb on your PC

Create backups

Plug the tablet with USB to the PC and boot to recovery (TWRP). Then backup the partitions "dtbo", "boot", "recovery", "system" and "userdata":

adb pull /dev/block/by-name/dtbo dtbo.img
adb pull /dev/block/by-name/boot boot.img
adb pull /dev/block/by-name/recovery recovery.img
adb pull /dev/block/by-name/system system.img
adb pull /dev/block/by-name/userdata userdata.img

Build

The vendor is "Samsung", the codename is "gts4lvwifi".

Follow the pmbootstrap article, until you have done the install action (note that --fde stands for full-disk-encryption - this is currently not supported on this device).

Notice While the device is packed with downstream kernel in pmaports, the close-to-mainline kernel also boots on the device. Check the #Build notes section for further information.

Flashing

Hint When issuing the following commands without the --no-reboot option, the device will reboot after each flashing process. Remember to hold Volume Up + Volume Down to automatically boot to Download Mode again.

To boot custom images, Android Verified Boot (AVB) must be disabled. This is done by flashing a custom vbmeta.img with pmbootstrap:

$ pmbootstrap flasher flash_vbmeta

Then flash the rootfs and kernel.

$ pmbootstrap flasher flash_rootfs
$ pmbootstrap flasher flash_kernel
Note When flashing with pmbootstrap, a fork of Heimdall is used that is still maintained. This can also be used to manually flash the images, if needed. Other flashing methods might also work (Odin, from recovery, etc.) but are not tested.


Build notes

Mainlining

The close-to-mainline SDM670 kernel boots with a devicetree derived from the Google Pixel 3a DTS. There are a few things still missing before Usia wants to update the device package to use the close-to-mainline kernel.

Things that already worked:

  • CPU
  • Display (simple-framebuffer)
  • Bluetooth (it worked but was hacky to get connected)
  • Wi-Fi (2.4 GHz worked in Australia with nl80211 drivers, not wext)

Things still missing (not complete):

  • USB
  • Touchscreen
  • Charger
  • Battery
  • Audio

To boot the mainline kernel, the DTBO partition must be emptied. The following commands will create a blank dtbo image, sign it with avbtool and flash it.

$ dd if=/dev/zero of=empty_dtbo.img count=1
$ avbtool add_hash_footer --partition_name dtbo --partition_size 8388608 --image empty_dtbo.img
$ heimdall flash --DTBO empty_dtbo.img

To boot the mainline kernel, the following DTS file must be used and added to the Makefile.

/arch/arm64/boot/dts/qcom/sdm670-samsung-gts4lvwifi.dts

// SPDX-License-Identifier: GPL-2.0
/*
 * Device tree for Google Pixel 3a, adapted from google-blueline device tree,
 * xiaomi-lavender device tree, and oneplus-common device tree.
 *
 * Copyright (c) 2022, Richard Acayan. All rights reserved.
 */

/dts-v1/;

#include <dt-bindings/firmware/qcom,scm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/sound/qcom,q6afe.h>
#include <dt-bindings/sound/qcom,q6asm.h>
#include <dt-bindings/sound/qcom,q6voice.h>
#include "sdm670.dtsi"
#include "pm660.dtsi"
#include "pm660l.dtsi"
#include "sdm670-google-common-dtbo-mask.dtsi"

/delete-node/ &mpss_region;
/delete-node/ &venus_mem;
/delete-node/ &wlan_msa_mem;
/delete-node/ &cdsp_mem;
/delete-node/ &mba_region;
/delete-node/ &adsp_mem;
/delete-node/ &ipa_fw_mem;
/delete-node/ &ipa_gsi_mem;
/delete-node/ &gpu_mem;
/delete-node/ &rmtfs_mem;

/ {
	chassis-type = "tablet";

	model = "Samsung Galaxy Tab S5e (SM-T720)";
	compatible = "samsung,gts4lvwifi", "qcom,sdm670";

	battery: battery {
		compatible = "simple-battery";

		charge-full-design-microamp-hours = <7040000>;

		voltage-min-design-microvolt = <3312000>;
		voltage-max-design-microvolt = <4400000>;
	};

	chosen {
		stdout-path = "serial0:115200n8";

		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		framebuffer0: framebuffer@9c000000 {
			compatible = "simple-framebuffer";
			reg = <0 0x9c000000 0 (2560 * 1600 * 4)>;
			width = <2560>;
			height = <1600>;
			stride = <(2560 * 4)>;
			format = "a8r8g8b8";
			status = "okay";
		};
	};

	clocks {
		int_cdc_bclk: int-cdc-bclk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <1536000>;
		};

		sleep_clk: sleep-clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <32764>;
		};

		xo_board: xo-board {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <38400000>;
		};
	};

	gpio-keys {
		compatible = "gpio-keys";
		autorepeat;

		pinctrl-names = "default";
		pinctrl-0 = <&vol_up_pin>;

		key-vol-up {
			label = "Volume Up";
			linux,code = <KEY_VOLUMEUP>;
			gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>;
		};
	};

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;

		mpss_region: mpss@8b000000 {
			reg = <0 0x8b000000 0 0x9800000>;
			no-map;
		};

		venus_mem: venus@94800000 {
			reg = <0 0x94800000 0 0x500000>;
			no-map;
		};

		wlan_msa_mem: wlan-msa@94d00000 {
			reg = <0 0x94d00000 0 0x100000>;
			no-map;
		};

		cdsp_mem: cdsp@94e00000 {
			reg = <0 0x94e00000 0 0x800000>;
			no-map;
		};

		mba_region: mba@95600000 {
			reg = <0 0x95600000 0 0x200000>;
			no-map;
		};

		adsp_mem: adsp@95800000 {
			reg = <0 0x95800000 0 0x2200000>;
			no-map;
		};

		ipa_fw_mem: ipa-fw@97a00000 {
			reg = <0 0x97a00000 0 0x10000>;
			no-map;
		};

		ipa_gsi_mem: ipa-gsi@97a10000 {
			reg = <0 0x97a10000 0 0x5000>;
			no-map;
		};

		gpu_mem: gpu@97a15000 {
			reg = <0 0x97a15000 0 0x2000>;
			no-map;
		};

		framebuffer-region@9c000000 {
			reg = <0 0x9c000000 0 0x2400000>;
			no-map;
		};

		/* Also includes ramoops regions */
		debug_info_mem: debug-info@a1800000 {
			reg = <0 0xa1800000 0 0x411000>;
			no-map;
		};

		/*
		 * The rmtfs_mem needs to be guarded due to "XPU limitations"
		 * it is otherwise possible for an allocation adjacent to the
		 * rmtfs_mem region to trigger an XPU violation, causing a
		 * crash.
		 */
		rmtfs_lower_guard: rmtfs-lower-guard@fc200000 {
			reg = <0 0xfc200000 0 0x1000>;
			no-map;
		};

		/*
		 * The rmtfs memory region in downstream is 'dynamically
		 * allocated' but given the same address every time. Hard code
		 * it as this address is where the modem firmware expects it to
		 * be.
		 */
		rmtfs_mem: rmtfs-mem@fc201000 {
			compatible = "qcom,rmtfs-mem";
			reg = <0 0xfc201000 0 0x200000>;
			no-map;

			qcom,client-id = <1>;
			qcom,vmid = <QCOM_SCM_VMID_MSS_MSA>;
		};

		rmtfs_upper_guard: rmtfs-upper-guard@fc401000 {
			reg = <0 0xfc401000 0 0x1000>;
			no-map;
		};
	};

	sound {
		compatible = "qcom,sdm660-internal-sndcard";
		model = "Google Pixel 3a";

		pinctrl-names = "default";
		pinctrl-0 = <&cdc_pdm_default>,
			    <&cdc_dmic_default>,
			    <&pri_tdm_default>,
			    <&sec_tdm_default>;

		audio-routing = "Analog PDM_RX1", "Digital PDM_RX1",
				"Analog PDM_RX2", "Digital PDM_RX2",
				"Analog PDM_RX3", "Digital PDM_RX3",
				"Digital LPASS_PDM_TX", "Analog PDM_TX",
				"Analog AMIC2", "Analog MIC BIAS External2",
				"Stereo1 DMIC Mux", "Analog MIC BIAS Internal1";

		mm1-dai-link {
			link-name = "MultiMedia1";

			cpu {
				sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA1>;
			};
		};

		mm2-dai-link {
			link-name = "MultiMedia2";

			cpu {
				sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA2>;
			};
		};

		mm3-dai-link {
			link-name = "MultiMedia3";

			cpu {
				sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA3>;
			};
		};

		mm4-dai-link {
			link-name = "MultiMedia4";

			cpu {
				sound-dai = <&q6asmdai MSM_FRONTEND_DAI_MULTIMEDIA4>;
			};
		};

		voicemmode1-dai-link {
			link-name = "VoiceMMode1";

			cpu {
				sound-dai = <&q6voicedai VOICEMMODE1>;
			};
		};

		pri-tdm-tx-link {
			link-name = "Primary TDM0 Capture";

			cpu {
				sound-dai = <&q6afedai PRIMARY_TDM_TX_0>;
			};

			platform {
				sound-dai = <&q6routing>;
			};

			codec {
				sound-dai = <&rt5514_i2c 0>;
			};
		};

		sec-tdm-rx-link {
			link-name = "Secondary TDM0 Playback";

			cpu {
				sound-dai = <&q6afedai SECONDARY_TDM_RX_0>;
			};

			platform {
				sound-dai = <&q6routing>;
			};

			codec {
				sound-dai = <&cs35l36_top 0>,
					    <&cs35l36_bottom 0>;
			};
		};

		int0-mi2s-rx-link {
			link-name = "Internal MI2S Playback";

			cpu {
				sound-dai = <&q6afedai INT0_MI2S_RX>;
			};

			platform {
				sound-dai = <&q6routing>;
			};

			codec {
				sound-dai = <&pm660l_codec 0>,
					    <&lpass_codec 0>;
			};
		};

		int3-mi2s-tx-link {
			link-name = "Internal MI2S Capture";

			cpu {
				sound-dai = <&q6afedai INT3_MI2S_TX>;
			};

			platform {
				sound-dai = <&q6routing>;
			};

			codec {
				sound-dai = <&pm660l_codec 1>,
					    <&lpass_codec 1>;
			};
		};
	};

	thermal-zones {
		xo-thermal {
			polling-delay-passive = <250>;
			polling-delay = <1000>;

			thermal-sensors = <&pm660_adc_tm 0>;

			cooling-maps {
				map0 {
					trip = <&xo_alert0>;
					cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};

				map1 {
					trip = <&xo_alert1>;
					cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							 <&CPU5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;

				};
			};

			trips {
				xo_alert0: trip-point0 {
					temperature = <47000>;
					hysteresis = <1000>;
					type = "passive";
				};

				xo_alert1: trip-point1 {
					temperature = <52000>;
					hysteresis = <1000>;
					type = "passive";
				};

				xo_crit: trip-point2 {
					temperature = <59000>;
					hysteresis = <1000>;
					type = "critical";
				};
			};
		};
	};

	/*
	 * The touchscreen regulator seems to be controlled somehow by a gpio.
	 * Model it as a fixed regulator and keep it on. Without schematics we
	 * don't know how this is actually wired up...
	 */
	ts_1p8_supply: ts-1p8-regulator {
		compatible = "regulator-fixed";
		regulator-name = "ts_1p8_supply";

		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;

		gpio = <&pm660_gpios 12 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	vph_pwr: vph-pwr-regulator {
		compatible = "regulator-fixed";
		regulator-name = "vph_pwr";
		regulator-min-microvolt = <3312000>;
		regulator-max-microvolt = <3312000>;

		regulator-always-on;
		regulator-boot-on;
	};

	/*
	 * Supply map from xiaomi-lavender specifies this as the supply for
	 * ldob1, ldob9, ldob10, ldoa2, and ldoa3, while downstream specifies
	 * this as a power domain. Set this as a fixed regulator with the same
	 * voltage as lavender until display is needed to avoid unneccessarily
	 * using a deprecated binding (regulator-fixed-domain).
	 */
	vreg_s2b_1p05: vreg-s2b-regulator {
		compatible = "regulator-fixed";
		regulator-name = "vreg_s2b";
		regulator-min-microvolt = <1050000>;
		regulator-max-microvolt = <1050000>;
	};

	cam_front_ldo: cam-front-ldo-regulator {
		compatible = "regulator-fixed";
		regulator-name = "cam_front_ldo";
		regulator-min-microvolt = <1352000>;
		regulator-max-microvolt = <1352000>;
		regulator-enable-ramp-delay = <135>;

		gpios = <&pm660l_gpios 4 GPIO_ACTIVE_HIGH>;
		enable-active-high;

		pinctrl-names = "default";
		pinctrl-0 = <&cam_front_ldo_pin>;
	};

	cam_rear_ldo: cam-rear-ldo-regulator {
		compatible = "regulator-fixed";
		regulator-name = "cam_rear_ldo";
		regulator-min-microvolt = <1352000>;
		regulator-max-microvolt = <1352000>;
		regulator-enable-ramp-delay = <233>;

		gpios = <&pm660l_gpios 3 GPIO_ACTIVE_HIGH>;
		enable-active-high;

		pinctrl-names = "default";
		pinctrl-0 = <&cam_rear_ldo_pin>;
	};

	cam_vio_ldo: cam-vio-ldo-regulator {
		compatible = "regulator-fixed";
		regulator-name = "cam_vio_ldo";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-enable-ramp-delay = <233>;

		gpios = <&pm660_gpios 13 GPIO_ACTIVE_HIGH>;
		enable-active-high;

		pinctrl-names = "default";
		pinctrl-0 = <&cam_vio_pin>;
	};
};

&adsp_pas {
	status = "okay";
	firmware-name = "qcom/sdm670/sargo/adsp.mbn";
};

&apps_rsc {
	regulators-0 {
		compatible = "qcom,pm660-rpmh-regulators";
		qcom,pmic-id = "a";

		vdd-s1-supply = <&vph_pwr>;
		vdd-s2-supply = <&vph_pwr>;
		vdd-s3-supply = <&vph_pwr>;
		vdd-s4-supply = <&vph_pwr>;
		vdd-s5-supply = <&vph_pwr>;
		vdd-s6-supply = <&vph_pwr>;

		vdd-l1-l6-l7-supply = <&vreg_s6a_0p87>;
		vdd-l2-l3-supply = <&vreg_s2b_1p05>;
		vdd-l5-supply = <&vreg_s2b_1p05>;
		vdd-l8-l9-l10-l11-l12-l13-l14-supply = <&vreg_s4a_2p04>;
		vdd-l15-l16-l17-l18-l19-supply = <&vreg_bob>;

		/*
		 * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed
		 * by the Core Power Reduction hardened (CPRh) and the
		 * Operating State Manager (OSM) HW automatically.
		 */

		vreg_s4a_2p04: smps4 {
			regulator-min-microvolt = <1808000>;
			regulator-max-microvolt = <2040000>;
			regulator-enable-ramp-delay = <200>;
		};

		vreg_s6a_0p87: smps6 {
			regulator-min-microvolt = <1224000>;
			regulator-max-microvolt = <1352000>;
			regulator-enable-ramp-delay = <150>;
		};

		/* LDOs */
		vreg_l1a_1p225: ldo1 {
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1250000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l2a_1p0: ldo2 {
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1000000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l3a_1p0: ldo3 {
			regulator-min-microvolt = <1000000>;
			regulator-max-microvolt = <1000000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l5a_0p848: ldo5 {
			regulator-min-microvolt = <800000>;
			regulator-max-microvolt = <800000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l6a_1p3: ldo6 {
			regulator-min-microvolt = <1248000>;
			regulator-max-microvolt = <1304000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l7a_1p2: ldo7 {
			regulator-min-microvolt = <1200000>;
			regulator-max-microvolt = <1200000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l8a_1p8: ldo8 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <250>;
			regulator-always-on;
		};

		vreg_l9a_1p8: ldo9 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l10a_1p8: ldo10 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l11a_1p8: ldo11 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l12a_1p8: ldo12 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l13a_1p8: ldo13 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l14a_1p8: ldo14 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l15a_1p8: ldo15 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <2950000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l16a_2p7: ldo16 {
			regulator-min-microvolt = <2696000>;
			regulator-max-microvolt = <2696000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l17a_1p8: ldo17 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <2950000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l19a_3p3: ldo19 {
			regulator-min-microvolt = <3000000>;
			regulator-max-microvolt = <3312000>;
			regulator-enable-ramp-delay = <250>;
		};
	};

	regulators-1 {
		compatible = "qcom,pm660l-rpmh-regulators";
		qcom,pmic-id = "b";

		vdd-s1-supply = <&vph_pwr>;
		vdd-s2-supply = <&vph_pwr>;
		vdd-s3-s4-supply = <&vph_pwr>;
		vdd-s5-supply = <&vph_pwr>;

		vdd-l1-l9-l10-supply = <&vreg_s2b_1p05>;
		vdd-l2-supply = <&vreg_bob>;
		vdd-l3-l5-l7-l8-supply = <&vreg_bob>;
		vdd-l4-l6-supply = <&vreg_bob>;
		vdd-bob-supply = <&vph_pwr>;

		/* LDOs */
		vreg_l1b_0p925: ldo1 {
			regulator-min-microvolt = <880000>;
			regulator-max-microvolt = <900000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l2b_2p95: ldo2 {
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <2960000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l3b_3p0: ldo3 {
			regulator-min-microvolt = <2850000>;
			regulator-max-microvolt = <3008000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l4b_2p95: ldo4 {
			regulator-min-microvolt = <2960000>;
			regulator-max-microvolt = <2960000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l5b_2p95: ldo5 {
			regulator-min-microvolt = <2960000>;
			regulator-max-microvolt = <2960000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l6b_3p3: ldo6 {
			regulator-min-microvolt = <3008000>;
			regulator-max-microvolt = <3300000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l7b_3p125: ldo7 {
			regulator-min-microvolt = <3088000>;
			regulator-max-microvolt = <3100000>;
			regulator-enable-ramp-delay = <250>;
		};

		vreg_l8b_3p3: ldo8 {
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3312000>;
			regulator-enable-ramp-delay = <250>;
		};

		/*
		 * Downstream specifies a fixed voltage of 3.312 V, but the
		 * PMIC4 BOB ranges don't support that. Widen the range a
		 * little to avoid adding a new BOB regulator type.
		 */
		vreg_bob: bob {
			regulator-min-microvolt = <3296000>;
			regulator-max-microvolt = <3328000>;
			regulator-enable-ramp-delay = <500>;
		};
	};
};

&camss {
	vdda-phy-supply = <&vreg_l1a_1p225>;
	status = "okay";
};

&camss_port0 {
	camss_endpoint0: endpoint {
		clock-lanes = <7>;
		data-lanes = <0 1 2 3>;
		remote-endpoint = <&cam_rear_endpoint>;
	};
};

&camss_port1 {
	camss_endpoint1: endpoint {
		clock-lanes = <7>;
		data-lanes = <0 1 2 3>;
		remote-endpoint = <&cam_front_endpoint>;
	};
};

&cci {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&cci0_default &cci1_default &cam_mclk_default>;
	pinctrl-1 = <&cci0_sleep &cci1_sleep>;

	status = "okay";
};

&cci_i2c0 {
	camera@1a {
		compatible = "sony,imx363";
		reg = <0x1a>;

		clocks = <&camcc CAM_CC_MCLK0_CLK>;
		clock-names = "xvclk";

		clock-frequency = <24000000>;

		assigned-clocks = <&camcc CAM_CC_MCLK0_CLK>;
		assigned-clock-rates = <24000000>;

		reset-gpios = <&tlmm 127 GPIO_ACTIVE_HIGH>;

		vif-supply = <&cam_vio_ldo>;
		vana-supply = <&cam_rear_ldo>;
		vdig-supply = <&cam_rear_ldo>;
		vio-supply = <&cam_vio_ldo>;

		pinctrl-names = "default";
		pinctrl-0 = <&cam_rear_default>;

		rotation = <90>;
		orientation = <1>;

		port {
			cam_rear_endpoint: endpoint {
				data-lanes = <0 1 2 3>;
				link-frequencies = /bits/ 64 <321000000 636000000>;
				remote-endpoint = <&camss_endpoint0>;
			};
		};
	};
};

&cci_i2c1 {
	camera@1a {
		compatible = "sony,imx355";
		reg = <0x1a>;

		clocks = <&camcc CAM_CC_MCLK2_CLK>;
		clock-names = "mclk";

		clock-frequency = <19200000>;

		assigned-clocks = <&camcc CAM_CC_MCLK2_CLK>;
		assigned-clock-rates = <24000000>;

		reset-gpios = <&tlmm 9 GPIO_ACTIVE_HIGH>;

		vana-supply = <&cam_front_ldo>;
		vdig-supply = <&cam_front_ldo>;
		vio-supply = <&cam_vio_ldo>;

		pinctrl-names = "default";
		pinctrl-0 = <&cam_front_default>;

		rotation = <270>;
		orientation = <0>;

		port {
			cam_front_endpoint: endpoint {
				data-lanes = <0 1 2 3>;
				link-frequencies = /bits/ 64 <360000000>;
				remote-endpoint = <&camss_endpoint1>;
			};
		};
	};
};

&dispcc {
	/* disable when using simple framebuffer */
	status = "disabled";
};

&gcc {
	protected-clocks = <GCC_QSPI_CORE_CLK>,
			   <GCC_QSPI_CORE_CLK_SRC>,
			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
};

&gpi_dma0 {
	status = "okay";
};

&gpi_dma1 {
	status = "okay";
};

&gpu {
	status = "okay";

	zap-shader {
		memory-region = <&gpu_mem>;
		firmware-name = "qcom/sdm670/sargo/a615_zap.mbn";
	};
};

&i2c9 {
	clock-frequency = <100000>;
	status = "okay";

	synaptics-rmi4-i2c@20 {
		compatible = "syna,rmi4-i2c";
		reg = <0x20>;
		interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>;

		pinctrl-names = "default";
		pinctrl-0 = <&touchscreen_default>;

		vio-supply = <&ts_1p8_supply>;

		syna,reset-delay-ms = <200>;
		syna,startup-delay-ms = <200>;

		#address-cells = <1>;
		#size-cells = <0>;

		rmi4-f01@1 {
			reg = <0x01>;
			syna,nosleep-mode = <1>;
		};

		rmi4_f12: rmi4-f12@12 {
			reg = <0x12>;
			syna,sensor-type = <1>;
		};
	};
};

&i2c10 {
	clock-frequency = <400000>;
	status = "okay";

	cs35l36_top: audio-codec@40 {
		/* top speaker - portrait left */
		compatible = "cirrus,cs35l36";
		reg = <0x40>;

		cirrus,boost-ind-nanohenry = <1000>;
		cirrus,boost-ctl-select = <0x01>;
		cirrus,boost-ctl-millivolt = <10000>;
		cirrus,boost-peak-milliamp = <2600>;
		cirrus,weak-fet-delay = <0x04>;
		cirrus,weak-fet-thld = <0x01>;
		cirrus,temp-warn-threshold = <0x01>;
		cirrus,multi-amp-mode;

		cirrus,irq-drive-select = <0x01>;
		cirrus,irq-gpio-select = <0x00>;

		sound-name-prefix = "Top";

		interrupts-extended = <&tlmm 80 IRQ_TYPE_LEVEL_HIGH>;

		reset-gpios = <&tlmm 14 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";
		pinctrl-0 = <&cs35l36_top_default>;

		#sound-dai-cells = <1>;
	};

	cs35l36_bottom: audio-codec@41 {
		/* bottom speaker - portrait right */
		compatible = "cirrus,cs35l36";
		reg = <0x41>;

		cirrus,boost-ind-nanohenry = <1000>;
		cirrus,boost-ctl-select = <0x01>;
		cirrus,boost-ctl-millivolt = <10000>;
		cirrus,boost-peak-milliamp = <2600>;
		cirrus,temp-warn-threshold = <0x01>;
		cirrus,multi-amp-mode;

		cirrus,irq-drive-select = <0x01>;
		cirrus,irq-gpio-select = <0x00>;

		sound-name-prefix = "Bottom";

		interrupts-extended = <&tlmm 79 IRQ_TYPE_LEVEL_HIGH>;

		reset-gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>;

		pinctrl-names = "default";
		pinctrl-0 = <&cs35l36_bottom_default>;

		#sound-dai-cells = <1>;
	};

	rt5514_i2c: audio-codec@57 {
		compatible = "realtek,rt5514";
		reg = <0x57>;
		#sound-dai-cells = <1>;
	};
};

&ipa {
	firmware-name = "qcom/sdm670/sargo/ipa_fws.mbn";
	status = "okay";
};

&lpass_codec {
	clocks = <&q6afecc LPASS_CLK_ID_INT_MCLK_0 LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
		 <&int_cdc_bclk>;
	clock-names = "mclk", "ahbix-clk";

	assigned-clocks = <&q6afecc LPASS_CLK_ID_INT_MCLK_0 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
	assigned-clock-rates = <9600000>;

	status = "okay";
};

&lpi_tlmm {
	sec_tdm_default: sec-tdm-default-state {
		misc-pins {
			pins = "gpio8", "gpio9";
			function = "sec_tdm";
			drive-strength = <8>;
			bias-disable;
		};

		din-pins {
			pins = "gpio10";
			function = "sec_tdm_din";
			drive-strength = <8>;
			bias-disable;
		};

		dout-pins {
			pins = "gpio11";
			function = "sec_tdm_dout";
			drive-strength = <8>;
			bias-disable;
		};
	};
};

&mdss {
	status = "okay";
};

&mdss_dsi0 {
	vdda-supply = <&vreg_l1a_1p225>;
	status = "okay";

	panel: panel@0 {
		// compatible is provided in specific device trees
		reg = <0>;

		reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>;

		pinctrl-names = "default";
		pinctrl-0 = <&panel_default>;

		power-supply = <&vreg_l6b_3p3>;

		status = "disabled";

		port {
			panel_in: endpoint {
				remote-endpoint = <&mdss_dsi0_out>;
			};
		};
	};
};

&mdss_dsi0_out {
	remote-endpoint = <&panel_in>;
	data-lanes = <0 1 2 3>;
};

&mdss_dsi0_phy {
	vdds-supply = <&vreg_l1b_0p925>;
	status = "okay";
};

&mdss_mdp {
	status = "okay";
};

&mss_pil {
	firmware-name = "qcom/sdm670/sargo/mba.mbn", "qcom/sdm670/sargo/modem.mbn";
	status = "okay";
};

&pm660_adc_tm {
	status = "okay";

	xo-therm@0 {
		reg = <0>;
		io-channels = <&pm660_adc ADC5_XO_THERM_100K_PU>;
		qcom,hw-settle-time-us = <200>;
		qcom,pre-scaling = <1 20>;
		qcom,ratiometric;
	};
};

&pm660_charger {
	monitored-battery = <&battery>;
	status = "okay";
};

&pm660_fg {
	monitored-battery = <&battery>;
	power-supplies = <&pm660_charger>;
	status = "okay";
};

&pm660_gpios {
	cam_vio_pin: cam-vio-state {
		pins = "gpio13";
		function = "normal";
		power-source = <PM8941_GPIO_VPH>;
		output-low;
	};
};

&pm660_rradc {
	status = "okay";
};

&pm660l_codec {
	clocks = <&q6afecc LPASS_CLK_ID_INT_MCLK_0 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
	clock-names = "mclk";

	assigned-clocks = <&q6afecc LPASS_CLK_ID_INT_MCLK_0 LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
	assigned-clock-rates = <9600000>;

	vdd-cdc-io-supply = <&vreg_l10a_1p8>;
	vdd-cdc-tx-rx-cx-supply = <&vreg_l1b_0p925>;
	vdd-micbias-supply = <&vreg_l7b_3p125>;

	qcom,micbias-lvl = <2500>;
	qcom,micbias1-ext-cap;

	status = "okay";
};

&pm660l_flash {
	status = "okay";

	led-0 {
		function = LED_FUNCTION_FLASH;
		color = <LED_COLOR_ID_WHITE>;
		led-sources = <1>, <2>;
		led-max-microamp = <500000>;
		flash-max-microamp = <1500000>;
		flash-max-timeout-us = <1280000>;
	};
};

&pm660l_gpios {
	cam_rear_ldo_pin: cam-rear-state {
		pins = "gpio3";
		function = "normal";
		power-source = <PM8941_GPIO_VPH>;
		output-low;
	};

	cam_front_ldo_pin: cam-front-state {
		pins = "gpio4";
		function = "normal";
		power-source = <PM8941_GPIO_VPH>;
		output-low;
	};

	vol_up_pin: vol-up-state {
		pins = "gpio7";
		function = "normal";
		qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
		input-enable;
		bias-pull-up;
	};
};

&pon_pwrkey {
	status = "okay";
};

&pon_resin {
	linux,code = <KEY_VOLUMEDOWN>;
	status = "okay";
};

&qupv3_id_0 {
	status = "okay";
};

&qupv3_id_1 {
	status = "okay";
};

&q6afedai {
	dai@19 {
		reg = <PRIMARY_TDM_TX_0>;

		qcom,tdm-sync-mode = <0>;
		qcom,tdm-sync-src = <1>;
		qcom,tdm-data-out = <0>;
		qcom,tdm-invert-sync = <0>;
		qcom,tdm-data-delay = <1>;
		qcom,tdm-data-align = <0>;
	};

	dai@28 {
		reg = <SECONDARY_TDM_RX_0>;

		qcom,tdm-sync-mode = <0>;
		qcom,tdm-sync-src = <1>;
		qcom,tdm-data-out = <0>;
		qcom,tdm-invert-sync = <0>;
		qcom,tdm-data-delay = <1>;
		qcom,tdm-data-align = <0>;
	};

	dai@81 {
		reg = <INT0_MI2S_RX>;
		qcom,sd-lines = <0 1>;
	};

	dai@88 {
		reg = <INT3_MI2S_TX>;
		qcom,sd-lines = <0 1>;
	};
};

&q6asmdai {
	dai@0 {
		reg = <0>;
	};

	dai@1 {
		reg = <1>;
	};

	dai@2 {
		reg = <2>;
	};

	dai@3 {
		reg = <3>;
	};
};

&q6core {
	qcom,acdb-name = "qcom/sdm670/sargo/Global_cal.acdb";
};

&q6voicedai {
	dai@1 {
		reg = <VOICEMMODE1>;
	};
};

&sdhc_1 {
	supports-cqe;
	mmc-hs200-1_8v;
	mmc-hs400-1_8v;
	mmc-ddr-1_8v;

	qcom,ddr-config = <0xc3040873>;

	vmmc-supply = <&vreg_l4b_2p95>;
	vqmmc-supply = <&vreg_l8a_1p8>;

	status = "okay";
};

&spi2 {
	status = "okay";

	rt5514_spi: audio-codec@0 {
		compatible = "realtek,rt5514";
		reg = <0x00>;
		interrupts-extended = <&tlmm 126 IRQ_TYPE_EDGE_RISING>;
		pinctrl-names = "default";
		pinctrl-0 = <&rt5514_spi_default>;
		spi-max-frequency = <10000000>;
		spi-cpol;
		spi-cpha;
		#sound-dai-cells = <1>;
	};
};

&tlmm {
	gpio-reserved-ranges = <0 4>, <81 4>;

	cam_rear_default: cam-rear-default-state {
		vana-pins {
			pins = "gpio8";
			output-high;
		};

		reset-pins {
			pins = "gpio127";
			function = "gpio";
			drive-strength = <2>;
			bias-disable;
		};
	};

	cam_front_default: cam-front-default-state {
		pins = "gpio9";
		function = "gpio";
		drive-strength = <2>;
		bias-disable;
	};

	cam_mclk_default: cam-default-state {
		mclk0-pins {
			pins = "gpio13";
			function = "cam_mclk";
			drive-strength = <2>;
			bias-disable;
		};

		mclk2-pins {
			pins = "gpio15";
			function = "cam_mclk";
			drive-strength = <2>;
			bias-disable;
		};
	};

	cs35l36_top_default: cs35l36-top-default-state {
		reset-pins {
			pins = "gpio14";
			function = "gpio";
			drive-strength = <2>;
			output-high;
		};

		irq-pins {
			pins = "gpio80";
			function = "gpio";
			drive-strength = <2>;
			bias-pull-down;
			output-disable;
		};
	};

	cs35l36_bottom_default: cs35l36-bottom-default-state {
		reset-pins {
			pins = "gpio16";
			function = "gpio";
			drive-strength = <2>;
			output-high;
		};

		irq-pins {
			pins = "gpio79";
			function = "gpio";
			drive-strength = <2>;
			bias-pull-down;
			output-disable;
		};
	};

	panel_default: panel-default-state {
		te-pins {
			pins = "gpio10";
			function = "mdp_vsync";
			drive-strength = <2>;
			bias-pull-down;
		};

		reset-pins {
			pins = "gpio75";
			function = "gpio";
			drive-strength = <8>;
			bias-disable;
		};

		mode-pins {
			pins = "gpio76";
			function = "gpio";
			drive-strength = <8>;
			bias-disable;
		};
	};

	pri_tdm_default: pri-tdm-default-state {
		misc-pins {
			pins = "gpio65";
			function = "pri_mi2s";
			drive-strength = <8>;
		};

		ws-pins {
			pins = "gpio66";
			function = "pri_mi2s_ws";
			drive-strength = <8>;
		};

		dout-pins {
			pins = "gpio67";
			function = "pri_mi2s";
			drive-strength = <8>;
		};

		din-pins {
			pins = "gpio68";
			function = "pri_mi2s";
			drive-strength = <8>;
		};
	};

	pri_tdm_sleep: pri-tdm-sleep-state {
		misc-pins {
			pins = "gpio65";
			function = "pri_mi2s";
			drive-strength = <2>;
			bias-pull-down;
		};

		ws-pins {
			pins = "gpio66";
			function = "pri_mi2s_ws";
			drive-strength = <2>;
			bias-pull-down;
		};

		dout-pins {
			pins = "gpio67";
			function = "pri_mi2s";
			drive-strength = <2>;
			bias-pull-down;
		};

		din-pins {
			pins = "gpio68";
			function = "pri_mi2s";
			drive-strength = <2>;
			bias-pull-down;
		};
	};

	rt5514_spi_default: rt5514-spi-default-state {
		pins = "gpio126";
		function = "gpio";
		drive-strength = <2>;
		bias-pull-down;
		output-disable;
	};

	touchscreen_default: ts-default-state {
		ts-reset-pins {
			pins = "gpio99";
			function = "gpio";
			drive-strength = <2>;
			bias-pull-up;
			output-high;
		};

		ts-irq-pins {
			pins = "gpio125";
			function = "gpio";
			drive-strength = <2>;
			bias-disable;
		};

		ts-switch-pins {
			pins = "gpio135";
			function = "gpio";
			drive-strength = <2>;
			bias-disable;
			output-low;
		};
	};
};

&uart6 {
	pinctrl-0 = <&qup_uart6_4pin>;
	status = "okay";

	bluetooth {
		compatible = "qcom,wcn3990-bt";
		vddio-supply = <&vph_pwr>;
		vddxo-supply = <&vreg_l9a_1p8>;
		vddrf-supply = <&vreg_l6a_1p3>;
		vddch0-supply = <&vreg_l19a_3p3>;
		max-speed = <3200000>;
	};
};

&usb_1_hsphy {
	vdd-supply = <&vreg_l1b_0p925>;
	vdda-pll-supply = <&vreg_l10a_1p8>;
	vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;

	status = "okay";
};

&usb_1 {
	qcom,select-utmi-as-pipe-clk;
	status = "okay";
};

&usb_1_dwc3 {
	/* Only peripheral works for now */
	dr_mode = "peripheral";

	/* Do not assume that sdm670.dtsi will never support USB 3.0 */
	phys = <&usb_1_hsphy>;
	phy-names = "usb2-phy";
	maximum-speed = "high-speed";
};

&wifi {
	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p848>;
	vdd-1.8-xo-supply = <&vreg_l9a_1p8>;
	vdd-1.3-rfa-supply = <&vreg_l6a_1p3>;
	vdd-3.3-ch0-supply = <&vreg_l19a_3p3>;

	qcom,snoc-host-cap-8bit-quirk;

	status = "okay";
};

Changes made to pmaports device source:

diff --git a/device/testing/device-samsung-gts4lvwifi/APKBUILD b/device/testing/device-samsung-gts4lvwifi/APKBUILD
index 17d8d6397..4ef1189b6 100644
--- a/device/testing/device-samsung-gts4lvwifi/APKBUILD
+++ b/device/testing/device-samsung-gts4lvwifi/APKBUILD
@@ -1,16 +1,19 @@
 # Reference: <https://postmarketos.org/devicepkg>
 pkgname=device-samsung-gts4lvwifi
 pkgdesc="Samsung Galaxy Tab S5e (SM-T720)"
-pkgver=1
+pkgver=2
 pkgrel=0
 url="https://postmarketos.org"
 license="MIT"
 arch="aarch64"
 options="!check !archcheck"
 depends="
-	linux-samsung-gts4lvwifi
+	alsa-ucm-conf-qcom-sdm670
+	linux-postmarketos-qcom-sdm670
 	mkbootimg
 	postmarketos-base
+	soc-qcom-sdm845
+	soc-qcom-sdm845-qbootctl
 "
 makedepends="devicepkg-dev"
 source="
@@ -26,5 +29,5 @@ package() {
 }
 
 sha512sums="
-2aab399ff8e48c8165c8fd09e13846cfb73573daf7eb807b763414aba7e7b24460ffec994d0299988530d56a1e64b41021523387f45280249362137cab93c249  deviceinfo
+68b8199caa1357559f5195939eada47b49108d9ced4dfba45f35734cda2b2436f887be396907d3867fa47158be1853405b7eb94886e0d9545316c78d69efdd51  deviceinfo
 "
diff --git a/device/testing/device-samsung-gts4lvwifi/deviceinfo b/device/testing/device-samsung-gts4lvwifi/deviceinfo
index d9038a6e1..dfca07958 100644
--- a/device/testing/device-samsung-gts4lvwifi/deviceinfo
+++ b/device/testing/device-samsung-gts4lvwifi/deviceinfo
@@ -6,6 +6,8 @@ deviceinfo_format_version="0"
 deviceinfo_name="Samsung Galaxy Tab S5e (SM-T720)"
 deviceinfo_manufacturer="Samsung"
 deviceinfo_codename="samsung-gts4lvwifi"
+deviceinfo_dtb="qcom/sdm670-samsung-gts4lvwifi"
+deviceinfo_append_dtb="true"
 deviceinfo_year="2019"
 deviceinfo_arch="aarch64"
 
@@ -16,19 +18,17 @@ deviceinfo_external_storage="true"
 
 # Bootloader related
 deviceinfo_flash_method="heimdall-bootimg"
-deviceinfo_kernel_cmdline="androidboot.hardware=qcom video=vfb:640x400,bpp=32,memsize=3072000 msm_rtb.filter=0x237 ehci-hcd.park=3 lpm_levels.sleep_disabled=1 service_locator.enable=1 swiotlb=1 loop.max_part=7"
 deviceinfo_generate_bootimg="true"
 deviceinfo_bootimg_qcdt="false"
-deviceinfo_bootimg_mtk_mkimage="false"
 deviceinfo_bootimg_dtb_second="false"
 deviceinfo_flash_pagesize="4096"
-deviceinfo_header_version="1"
 deviceinfo_flash_offset_base="0x00000000"
 deviceinfo_flash_offset_kernel="0x00008000"
 deviceinfo_flash_offset_ramdisk="0x02000000"
 deviceinfo_flash_offset_second="0x00000000"
 deviceinfo_flash_offset_tags="0x01e00000"
 deviceinfo_flash_sparse="true"
+
 deviceinfo_flash_heimdall_partition_kernel="BOOT"
 deviceinfo_flash_heimdall_partition_rootfs="USERDATA"
 deviceinfo_flash_heimdall_partition_vbmeta="VBMETA"
Note Check Compiling kernels with envkernel.sh for easy kernel development.

Downstream

Notice This section is just kept for lookup but is not necessary for normal installation, as the device is now available on pmbootstrap by default.
Notes from Mparker17

Overall, Mparker17 found this pretty straightforward using the Porting to a new device instructions.

For a host machine, Mparker17 used Ubuntu 20.10.

For pmbootstrap init, use:

Channel [edge]: edge
Vendor [samsung]: samsung
Device codename [gts4lvwifi]: gts4lvwifi
Username [user]: user
User interface [weston]: weston
Additional options: extra free space: 0 MB, boot partition size: 128 MB, parallel jobs: 9, ccache per arch: 5G, sudo timer: False
Change them? (y/n) [n]: n
Extra packages [none]: none
Choose default locale for installation (y/n) [C.UTF-8]: C.UTF-8
Device hostname (short form, e.g. 'foo') [samsung-gts4lvwifi]: samsung-gts4lvwifi
Would you like to copy your SSH public keys to the device? (y/n) [n]: n
Build outdated packages during 'pmbootstrap install'? (y/n) [y]: y

... and the boot.img from LineageOS' build for the device (specifically, lineage-17.1-20210222-nightly-gts4lvwifi-signed.zip)

When editing cache_git/pmaports/device/testing/linux-samsung-gts4lvwifi/APKBUILD, remove the following 4 patches:

 gcc7-give-up-on-ilog2-const-optimizations.patch
 gcc8-fix-put-user.patch
 gcc10-extern_YYLOC_global_declaration.patch
 kernel-use-the-gnu89-standard-explicitly.patch

For pmbootstrap kconfig, fix the following issues documented on the Kconfig page:

WARNING: linux-samsung-gts4lvwifi/config-samsung-gts4lvwifi.aarch64: CONFIG_ANDROID_PARANOID_NETWORK should *not* be set. See <https://wiki.postmarketos.org/wiki/kconfig#CONFIG_ANDROID_PARANOID_NETWORK> for details.
WARNING: linux-samsung-gts4lvwifi/config-samsung-gts4lvwifi.aarch64: CONFIG_DEVTMPFS should be set. See <https://wiki.postmarketos.org/wiki/kconfig#CONFIG_DEVTMPFS> for details.
WARNING: linux-samsung-gts4lvwifi/config-samsung-gts4lvwifi.aarch64: CONFIG_SYSVIPC should be set. See <https://wiki.postmarketos.org/wiki/kconfig#CONFIG_SYSVIPC> for details.
WARNING: linux-samsung-gts4lvwifi/config-samsung-gts4lvwifi.aarch64: CONFIG_VT should be set. See <https://wiki.postmarketos.org/wiki/kconfig#CONFIG_VT> for details.

After fixing those, the kernel was built successfully, but it wasn't tested.

Partition table

ls -lha /dev/block/by-name/

total 0
drwxr-xr-x 2 root root 1.1K 2018-08-22 01:43 .
drwxr-xr-x 4 root root 1.8K 2018-08-22 01:43 ..
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 abl -> /dev/block/mmcblk0p10
lrwxrwxrwx 1 root root   20 2018-08-22 01:43 aop -> /dev/block/mmcblk0p5
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 apdp -> /dev/block/mmcblk0p17
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 apnhlos -> /dev/block/mmcblk0p44
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 bksecapp -> /dev/block/mmcblk0p13
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 bluetooth -> /dev/block/mmcblk0p12
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 boot -> /dev/block/mmcblk0p48
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 bota -> /dev/block/mmcblk0p36
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 btd -> /dev/block/mmcblk0p24
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 cache -> /dev/block/mmcblk0p53
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 cmnlib -> /dev/block/mmcblk0p15
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 cmnlib64 -> /dev/block/mmcblk0p16
lrwxrwxrwx 1 root root   20 2018-08-22 01:43 ddr -> /dev/block/mmcblk0p4
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 debug -> /dev/block/mmcblk0p56
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 devcfg -> /dev/block/mmcblk0p21
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 devinfo -> /dev/block/mmcblk0p11
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 dpo -> /dev/block/mmcblk0p19
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 dqmdbg -> /dev/block/mmcblk0p39
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 dsp -> /dev/block/mmcblk0p45
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 dtbo -> /dev/block/mmcblk0p47
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 efs -> /dev/block/mmcblk0p31
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 fota -> /dev/block/mmcblk0p37
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 fsc -> /dev/block/mmcblk0p28
lrwxrwxrwx 1 root root   20 2018-08-22 01:43 fsg -> /dev/block/mmcblk0p8
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 hidden -> /dev/block/mmcblk0p54
lrwxrwxrwx 1 root root   20 2018-08-22 01:43 hyp -> /dev/block/mmcblk0p7
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 keymaster -> /dev/block/mmcblk0p14
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 keystore -> /dev/block/mmcblk0p35
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 limits -> /dev/block/mmcblk0p20
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 logfs -> /dev/block/mmcblk0p40
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 misc -> /dev/block/mmcblk0p34
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 modem -> /dev/block/mmcblk0p46
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 modemst1 -> /dev/block/mmcblk0p26
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 modemst2 -> /dev/block/mmcblk0p27
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 msadp -> /dev/block/mmcblk0p18
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 omr -> /dev/block/mmcblk0p55
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 pad -> /dev/block/mmcblk0p25
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 param -> /dev/block/mmcblk0p32
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 persist -> /dev/block/mmcblk0p30
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 persistent -> /dev/block/mmcblk0p42
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 product -> /dev/block/mmcblk0p52
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 qupfw -> /dev/block/mmcblk0p38
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 recovery -> /dev/block/mmcblk0p49
lrwxrwxrwx 1 root root   20 2018-08-22 01:43 sec -> /dev/block/mmcblk0p9
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 sec_efs -> /dev/block/mmcblk0p33
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 ssd -> /dev/block/mmcblk0p29
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 steady -> /dev/block/mmcblk0p43
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 storsec -> /dev/block/mmcblk0p22
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 system -> /dev/block/mmcblk0p50
lrwxrwxrwx 1 root root   20 2018-08-22 01:43 tz -> /dev/block/mmcblk0p6
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 userdata -> /dev/block/mmcblk0p57
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 vbmeta -> /dev/block/mmcblk0p23
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 vendor -> /dev/block/mmcblk0p51
lrwxrwxrwx 1 root root   21 2018-08-22 01:43 vk -> /dev/block/mmcblk0p41
lrwxrwxrwx 1 root root   20 2018-08-22 01:43 xbl -> /dev/block/mmcblk0p1
lrwxrwxrwx 1 root root   20 2018-08-22 01:43 xbl_config -> /dev/block/mmcblk0p3
lrwxrwxrwx 1 root root   20 2018-08-22 01:43 xblbak -> /dev/block/mmcblk0p2

fdisk -l

Found valid GPT with protective MBR; using GPT

Disk /dev/mmcblk0: 122142720 sectors, 2296M
Logical sector size: 512
Disk identifier (GUID): 98101b32-bbe2-4bf2-a06e-2bb33d000c20
Partition table holds up to 128 entries
First usable sector is 34, last usable sector is 122142686

Number  Start (sector)    End (sector)  Size Name
     1            8192           16383 4096K xbl
     2           16384           24575 4096K xblbak
     3           24576           25599  512K xbl_config
     4           25600           27647 1024K ddr
     5           27648           29695 1024K aop
     6           29696           37887 4096K tz
     7           37888           39935 1024K hyp
     8           39936           44031 2048K fsg
     9           44032           45055  512K sec
    10           45056           53247 4096K abl
    11           53248           53759  256K devinfo
    12           53760           55807 1024K bluetooth
    13           55808           56831  512K bksecapp
    14           56832           57855  512K keymaster
    15           57856           59903 1024K cmnlib
    16           59904           61951 1024K cmnlib64
    17           61952           62975  512K apdp
    18           62976           63999  512K msadp
    19           64000           64511  256K dpo
    20           64512           65023  256K limits
    21           65024           66047  512K devcfg
    22           66048           67071  512K storsec
    23           67072           67327  128K vbmeta
    24           67328           71423 2048K btd
    25           71424           98303 13.1M pad
    26           98304          102399 2048K modemst1
    27          102400          106495 2048K modemst2
    28          106496          110591 2048K fsc
    29          110592          114687 2048K ssd
    30          114688          180223 32.0M persist
    31          180224          221183 20.0M efs
    32          221184          245759 12.0M param
    33          245760          286719 20.0M sec_efs
    34          286720          290815 2048K misc
    35          290816          294911 2048K keystore
    36          294912          360447 32.0M bota
    37          360448          409599 24.0M fota
    38          409600          409855  128K qupfw
    39          409856          442623 16.0M dqmdbg
    40          442624          459007 8192K logfs
    41          459008          463103 2048K vk
    42          463104          464127  512K persistent
    43          464128          472319 4096K steady
    44          472320          668927 96.0M apnhlos
    45          668928          742655 36.0M dsp
    46          742656          922879 88.0M modem
    47          922880          939263 8192K dtbo
    48          939264         1070335 64.0M boot
    49         1070336         1212415 69.3M recovery
    50         1212416        10846207 4704M system
    51        10846208        12681215  896M vendor
    52        12681216        13910015  600M product
    53        13910016        14729215  400M cache
    54        14729216        14749695 10.0M hidden
    55        14749696        14790655 20.0M omr
    56        14790656        14815231 12.0M debug
    57        14815232       122142686 51.1G userdata

Gallery

Notes

  1. HS8 is the main UART of this device, HS0 is secondary UART.

External links