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| {{Infobox soc
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| | name = Tegra 2
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| | manufacturer = Nvidia
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| | arch = armv7
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| | image = File:NVIDIA T20 chip.jpg
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| | imagecaption = NVIDIA T20 chip
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| | year = 2010
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| | cpu = 2x 1.0/1.2 GHz ARM Cortex-A9
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| | gpu = Nvidia ULP Geforce
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| | process = 40
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| | mainline = yes
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| | status_cpu = Y
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| | status_uart = Y
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| | status_storage = Y
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| | status_usb = Y
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| | status_display = Y
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| | status_gpu = P
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| | status_pinctrl = Y
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| | status_i2c = Y
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| | status_audio = Y
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| | status_video = Y
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| | status_thermal = Y
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| | status_wifi = -
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| | status_bluetooth = -
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| | status_modem = -
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| | status_gps = -
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| | status_camera = P
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| | status_suspend = Y
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| }}
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| == Development ==
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| === Bootloader ===
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| Currently except classic proprietary Aboot (using fastboot service), there is open-source [http://www.denx.de/wiki/U-Boot u-boot] development in progress for some Tegra devices. You can check [https://github.com/clamor-s/u-boot/commits/tf101 repository]
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| == Graphics ==
| | #REDIRECT [[Nvidia Tegra 2/3/4]] |
| === Components [https://github.com/grate-driver/ (source)] ===
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| * Mesa-3D (minimal implementation, not complete enough (GL 1.4) to run XWayland (requires GL 2.1 or GLES2)
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| * xf86-video-tegra (2D acceleration for X11, EXA)
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| * libvdpau-tegra
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| === Usability ===
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| Wayland:
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| * Phosh works, but UI is accelerated trough llvmpipe (software rendering), thus is slow.
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| * Plasma mobile not tested (please update)
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| X11:
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| * Xfce4 and Mate desktop will run on 2D acceleration.
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| * Hildon requires an OpenGL backend.
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| ** As of cogl 1.22.2 the clutter/cogl backend requires stencil buffers (<code>EGL_STENCIL_SIZE</code>). This not yet implemented in the grate-driver.
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| === Video Decoding ===
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| Video Decoder Engine (VDE) was added to mainline kernel v4.16. The grate-driver includes hardware h264 decoding with libvdpau-tegra.
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| The vdpau driver does '''not''' support h264 videos encoded with:
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| * weighted prediction
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| * CABAC
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| Sample video that can be decoded with hardware acceleration:
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| https://peach.blender.org/trailer-page/
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| <source lang="shell">
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| $ mpv --hwdec=vdpau trailer_720p.mov
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| Using hardware decoding (vdpau).
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| VO: [vdpau] 1280x720 vdpau[yuv420p]
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| </source>
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| == Participate development ==
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| === Develop ===
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| ==== Mesa3D Gallium driver ====
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| https://github.com/grate-driver/mesa
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| * Host1x ABI rework (required before mesa implemenetation): [https://docs.google.com/document/d/1hj7-Bup1NtjJVHzGvs92kTkah0EEh_9wDHBsQWUkuwo/edit (G. docs)]
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| * migrate from TGSI to NIR
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| * establishing demos that work, where can be seen regression
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| ==== New Device Trees ====
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| To generate the correct RAM timings for new Tegra 2 and 3 devices from known kernel sources, you can start from the known (downstream) RAM model code, and generate valid timings using this tool by Ion Agorria: https://gitlab.com/IonAgorria/tegra-timings-generator.
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| The #postmarketOS-on-transformers:matrix.org chat room will also be an excellent starting point for the porting of any new Tegra 2/3/4 device, also outside strictly the ASUS Transformer series
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| == Devices with a Tegra 2 Chipset ==
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| {{#cargo_query:
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| tables=Devices
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| |fields=CONCAT( '[[', _pageName, '|',Manufacturer,' ',Name,']]' )=Device,StatusMainline=Mainline
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| |order by=Devices.Manufacturer, Devices.Name
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| |format=table
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| |limit=9999
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| |where=Devices.chipset like '%Nvidia Tegra 2%'
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| |more results text=
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| }}
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| == See also ==
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| * Tegra 2's Cortex A9 implementation does not include ARM's SIMD extension, NEON. [https://en.wikipedia.org/wiki/Tegra More info here]
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| * Tegra 2 is very similiar to [[Nvidia_Tegra_3_(tegra30)]]
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